Analyse Numérique Des Effets Thermique Sur La Réponse Mécanique Des Microstructures De Type Flip-Chip En Front-End

Abstract

The fabrication of microelectronics progresses according to Moore's law; which means that microelectronics manufacturing is improving in an exponential way. There are several types of mounts in microelectronics among these mounts, flip chip editing which has become the cornerstone of electronic applications, such as mobile telephony. Our job is to analyze the thermomechanical behavior of a flip chip assembly by simulating an accelerated reliability test. Thermal cycling was chosen for this study. Indeed, four standard thermal cycles of JEDEC type (0-100 ° C / -40 _125 ° C / -55 _ 125 ° C / -60 _ 150 ° C) have been imposed numerically on our flip chip assembly in order to evaluate its resistance. Numerical simulations by the finite element method were therefore used to locate the stresses and residual deformations experienced by the micro component. From this, any problems of reliability can be identified. In addition to the results obtained, this study allowed us to identify the simulation code for limited elements of Abaqus and understand the basics of mechanical behavior of the materials.